TechDebt 2022
Tue 17 - Wed 18 May 2022 Pennsylvania, United States
co-located with ICSE 2022
ICSE 2022 (series) / TechDebt 2022 (series) / Midspace /

Room information: FormaliSE room

VenueMidspace
Room nameFormaliSE room
Room InformationNo extra information available

Information for Participants
Info for room FormaliSE room:

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Program

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Wed 18 May

Displayed time zone: Eastern Time (US & Canada) change

09:00 - 10:00
Keynote 1FormaliSE at FormaliSE room
Chair(s): Ina Schaefer Karlsruhe Institute of Technology (KIT)
09:00
60m
Keynote
Formal Methods for Dealing with Traffic Rules in Autonomous Driving
FormaliSE
Jana Tumova KTH Royal Institute of Technology, Sweden
10:30 - 11:45
Session 1FormaliSE at FormaliSE room
Chair(s): Mieke Massink CNR-ISTI Pisa, Italy
10:30
30m
Paper
Formal Modeling and Verification of Multi-Robot Interactive Scenarios in Service Settings
FormaliSE
Livia Lestingi DEIB, Politecnico di Milano, Giorgio Romeo , Cristian Sbrolli Politecnico di Milano, Pasquale Scarmozzino , Marcello M. Bersani Politecnico di Milano, Matteo Rossi Politecnico di Milano
11:05
5m
Talk
Counterexample-Guided Inductive Repair of Reactive Contracts
FormaliSE
Soha Hussein University of Minnesota, USA / Ain Shams University, Egypt, Sanjai Rayadurgam University of Minnesota, Stephen McCamant University of Minnesota, USA, Vaibhav Sharma Amazon, Mats Heimdahl University of Minnesota
11:15
30m
Paper
Formal Specifications Investigated: A Classification and Analysis of Annotations for Deductive Verifiers
FormaliSE
Sophie Lathouwers , Marieke Huisman University of Twente
12:00 - 13:30
Session 2FormaliSE at FormaliSE room
Chair(s): Livia Lestingi DEIB, Politecnico di Milano
12:00
30m
Paper
Computing Program Functions
FormaliSE
Hessamaldin Mohammadi , Wided Ghardallou , Richard Linger , Ali Mili NJIT
12:30
30m
Paper
C for Yourself: Comparison of Front-End Techniques for Formal Verification
FormaliSE
Levente Bajczi , Zsófia Ádám , Vince Molnár Budapest University of Technology and Economics
13:00
30m
Paper
Test Suite Generation for Boolean Conditions with Equivalence Class Partitioning
FormaliSE
Sylvain Hallé Université du Québec à Chicoutimi

Thu 19 May

Displayed time zone: Eastern Time (US & Canada) change

09:00 - 10:00
Keynote 2FormaliSE at FormaliSE room
Chair(s): Stefania Gnesi Istituto di Scienza e Tecnologie dell'Informazione "Alessandro Faedo"
09:00
60m
Keynote
 Digital Twins: An Emerging Paradigm for Model-Centric Engineering
FormaliSE
Einar Broch Johnsen University of Oslo
10:30 - 11:45
Session 3FormaliSE at FormaliSE room
Chair(s): Reiner Hähnle Technical University of Darmstadt
10:30
30m
Paper
Generating Counterexamples in the form of Unit Tests from Hoare-style Verification Attempts
FormaliSE
Amirfarhad Nilizadeh University of Central Florida, Marlon Calvo , Gary T. Leavens University of Central Florida, David Cok Safer Software Consulting, LLC
11:05
5m
Talk
Property-Driven Testing of Black-Box Functions
FormaliSE
Arnab Sharma University of Paderborn, Vitalik Melnikov , Eyke Hüllermeier , Heike Wehrheim Carl von Ossietzky Universität Oldenburg / University of Oldenburg
11:15
30m
Paper
Counting Bugs in Behavioural Models using Counterexample Analysis
FormaliSE
Irman Faqrizal , Gwen Salaün University of Grenoble Alpes
12:00 - 13:30
Session 4FormaliSE at FormaliSE room
Chair(s): Claudio Menghi McMaster University, Canada
12:00
30m
Paper
Towards Automated Input Generation for Sketching Alloy Models
FormaliSE
Ana Jovanovic , Allison Sullivan University of Texas at Arlington
12:30
30m
Paper
Automating Cryptographic Protocol Language Generation from Structured Specifications
FormaliSE
Roberto Metere Newcastle University, Luca Arnaboldi The University of Edinburgh
13:00
30m
Talk
Automatic Loop Invariant Generation for Data Dependence Analysis
FormaliSE
Asmae Heydari Tabar Technical University of Darmstadt, Richard Bubel Technische Universität Darmstadt, Reiner Hähnle Technical University of Darmstadt

Wed 18 May

Displayed time zone: Eastern Time (US & Canada) change

Room9:003010:003011:003012:003013:0030
FormaliSE room

FormaliSE

Keynote 1

FormaliSE

Session 1

FormaliSE

Session 2

Thu 19 May

Displayed time zone: Eastern Time (US & Canada) change

Room9:003010:003011:003012:003013:0030
FormaliSE room

FormaliSE

Keynote 2

FormaliSE

Session 3

FormaliSE

Session 4

Wed 18 May

Displayed time zone: Eastern Time (US & Canada) change

Room9:0015304510:0015304511:0015304512:0015304513:00153045
FormaliSE room
FormaliSE
Formal Methods for Dealing with Traffic Rules in Autonomous Driving
09:00 - 10:00
FormaliSE
Formal Modeling and Verification of Multi-Robot Interactive Scenarios i ...
10:30 - 11:00
FormaliSE
Counterexample-Guided Inductive Repair of Reactive Contracts
11:05 - 11:10
FormaliSE
Formal Specifications Investigated: A Classification and Analysis of An ...
11:15 - 11:45
FormaliSE
Computing Program Functions
12:00 - 12:30
FormaliSE
C for Yourself: Comparison of Front-End Techniques for Formal Verification
12:30 - 13:00
FormaliSE
Test Suite Generation for Boolean Conditions with Equivalence Class Par ...
13:00 - 13:30

Thu 19 May

Displayed time zone: Eastern Time (US & Canada) change

Room9:0015304510:0015304511:0015304512:0015304513:00153045
FormaliSE room
FormaliSE
Digital Twins: An Emerging Paradigm for Model-Centric Engineering
09:00 - 10:00
FormaliSE
Generating Counterexamples in the form of Unit Tests from Hoare-style V ...
10:30 - 11:00
FormaliSE
Property-Driven Testing of Black-Box Functions
11:05 - 11:10
FormaliSE
Counting Bugs in Behavioural Models using Counterexample Analysis
11:15 - 11:45
FormaliSE
Towards Automated Input Generation for Sketching Alloy Models
12:00 - 12:30
FormaliSE
Automating Cryptographic Protocol Language Generation from Structured S ...
12:30 - 13:00
FormaliSE
Automatic Loop Invariant Generation for Data Dependence Analysis
13:00 - 13:30